Bug 458845 - PowerPC: The L field for the dcbf and sync instruction should be 3 bits in ISA 3.1
Summary: PowerPC: The L field for the dcbf and sync instruction should be 3 bits in IS...
Status: CLOSED FIXED
Alias: None
Product: valgrind
Classification: Developer tools
Component: vex (show other bugs)
Version: 3.18.1
Platform: Other Linux
: NOR normal
Target Milestone: ---
Assignee: Julian Seward
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2022-09-07 16:32 UTC by Carl Love
Modified: 2022-09-07 19:30 UTC (History)
1 user (show)

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Description Carl Love 2022-09-07 16:32:06 UTC 
The L field is two bits wide for the sync and dcbf instruction in ISA 3.0 and older.  It changes to three bits in ISA 3.1.  The dcbf and sync instructions are only extracting two bits for ISA 3.1.
Comment 1 Carl Love 2022-09-07 19:30:22 UTC 
Patch to fix the issue committed.

commit 6658311aef8c1a604edb34f2763e83b25882e01b (HEAD -> master)
Author: Carl Love <cel@us.ibm.com>
Date:   Wed Sep 7 11:59:03 2022 -0500

    PowerPC: Fix the L field for the sync and dcbf instructions.
    
    The L field for the sync and dcbf instructions are three bits wide
    starting with ISA 3.1.  The L field is two bits wide prior to ISA 3.1.
    
    Patch based on patches from Shivaprasad Bhat <shivaprasadbhat@gmail.com>