The ACC support in ISA 3.1 is supposted to be done as a logical overlay of the VSR registers. The initial implementation was done as a physically separate register file.
Created attachment 146589 [details] Patch to change ACC to overlay VSRs Initial ACC support was implemented to use a separate register file, but in practice (ISA 3.1) the hardware implementation logically overlays over the existing VSR registers. This may change in future hardware, so the current implementation assumes ACC and VSRs logically contain the same data, but code remains in place to support future implementations that may require a separate register file. The patch reworks the code to support the ACC as implemented as a logical mapping over the VSR registers, and lays groundwork for a future implementation utilizing a separate register file. There is a single boolean variable, ACC_mapped_on_VSR, that can be set in disInstr_PPC_WRK(), based on the ISA being used, to select which implementation model to use.
Patch committed to fix the issue commit 193ced6bb34a49b5b41756b2c8616e392295328c Author: Carl Love <carll@us.ibm.com> Date: Tue Feb 8 17:52:33 2022 -0600 Powerpc: Update ACC support to reflect being mapped over vsr registers The ISA 3.1 implemention provides the effect of ACC and VSRs logically containing the same data. Future versions of the hardware may define new state or redefine the backing state of the registers. This reworks the code to support the ACC as implemented as a logical mapping over the VSR registers, and lays groundwork for a future implementation utilizing a separate register file. There is a single boolean variable, ACC_mapped_on_VSR, that can be set in disInstr_PPC_WRK(), based on the ISA being used, to select which implementation model to use.