Bug 444836 - PPC: pstq instruction for R=1 is not storing to the correct address
Summary: PPC: pstq instruction for R=1 is not storing to the correct address
Status: CLOSED FIXED
Alias: None
Product: valgrind
Classification: Developer tools
Component: vex (show other bugs)
Version: unspecified
Platform: Other Linux
: NOR normal
Target Milestone: ---
Assignee: Julian Seward
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2021-11-02 15:58 UTC by Carl Love
Modified: 2021-11-02 16:09 UTC (History)
0 users

See Also:
Latest Commit:
Version Fixed In:
Sentry Crash Report:


Attachments
patch to fix the pstq R=1 instruction store address (2.13 KB, patch)
2021-11-02 16:01 UTC, Carl Love
Details
New pc relative tests for PPC ISA 3.1 instrucitons (65.64 KB, patch)
2021-11-02 16:03 UTC, Carl Love
Details

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Description Carl Love 2021-11-02 15:58:58 UTC
The pstq instruction with R=1 (PC relative) is using the wrong effective address calculation.   The address calculation code was not properly updated to use the EA from the new functions for calculating the address based on the ISA 3.1 R flag.   As a result, the instruction with R=1 may or may not segmentation fault depending on the register contents.

New regression tests have been developed that allow the PC relative instruction testing.  These tests found the issue.
Comment 1 Carl Love 2021-11-02 16:01:48 UTC
Created attachment 143140 [details]
patch to fix the pstq R=1 instruction store address

Patch to fix the issue
Comment 2 Carl Love 2021-11-02 16:03:07 UTC
Created attachment 143141 [details]
New pc relative tests for PPC ISA 3.1 instrucitons

The patch adds tests for all of the new ISA 3.1 PC-relative instructions.
Comment 3 Carl Love 2021-11-02 16:09:01 UTC
The two patches in the attachments have been committed.

commit 3950c5d661ee09526cddcf24daf5fc22bc83f70c (HEAD -> master, origin/master, origin/HEAD)
Author: Carl Love <cel@us.ibm.com>
Date:   Mon Nov 1 11:18:32 2021 -0500

    Valgrind Add powerpc R=1 tests
    
    Contributed by Will Schmidt <will_schmidt@vnet.ibm.com>
    
    This includes updates and adjustments as suggested by Carl.
    
    Add tests that exercise PCRelative instructions.
    These instructions are encoded with R==1, which indicate that
    the memory accessed by the instruction is at a location
    relative to the currently executing instruction.
    
    These tests are built using -Wl,-text and -Wl,-bss
    options to ensure the location of the target array is at a
    location with a specific offset from the currently
    executing instruction.
    
    The write instructions are aimed at a large buffer in
    the bss section; which is checked for updates at the
    completion of each test.
    
    In order to ensure consistent output across assorted
    systems, the tests have been padded with ori, nop instructions
    and align directives.
    
    Detailed changes:
     * Makefile.am: Add test_isa_3_1_R1_RT and test_isa_3_1_R1_XT tests.
     * isa_3_1_helpers.h: Add identify_instruction_by_func_name() helper function
       to indicate if the test is for R==1.
       Add helpers to initialize and print changes to the pcrelative_write_target
       array.
       Add #define to help pad code with a series of eyecatcher ORI instructions.
         * test_isa_3_1_R1_RT.c: New test.
         * test_isa_3_1_R1_XT.c: New test.
         * test_isa_3_1_R1_XT.stdout.exp: New expected output.
         * test_isa_3_1_R1_XT.stdout.exp: New expected output.
         * test_isa_3_1_R1_RT.stderr.exp: New expected output.
         * test_isa_3_1_R1_RT.stderr.exp: New expected output.
    
         * test_isa_3_1_R1_RT.vgtest: New test handler.
         * test_isa_3_1_common.c: Add indicators (updates_byte,updates_halfword,
           updates_word) indicators to control the output from the R==1 tests.
           Add helper check for "_R1" to indicate if instruction is coded with R==1.
           Add init and print helpers for the pcrelative_write_target array.

commit ae8c6de01417023e78763de145b1c0e6ddd87277
Author: Carl Love <cel@us.ibm.com>
Date:   Wed Oct 20 20:40:13 2021 +0000

    Fix for the prefixed stq instruction in PC relative mode.
    
    The pstq instruction for R=1, was not using the correct effective address.
    The EA_hi and EA_lo should have been based on the value of EA as calculated
    by the function calculate_prefix_EA.  Unfortuanely, the EA_hi and EA_lo
    addresses were still using the previous code (not PC relative) to calculate
    the address from the contants of RA plus the offset.