Bug 409501 - amd64->IR: unhandled instruction bytes
Summary: amd64->IR: unhandled instruction bytes
Status: RESOLVED NOT A BUG
Alias: None
Product: valgrind
Classification: Developer tools
Component: vex (other bugs)
Version First Reported In: 3.14.0
Platform: unspecified Linux
: NOR crash
Target Milestone: ---
Assignee: Julian Seward
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-07-04 19:08 UTC by 4ctrl.alt.del
Modified: 2019-12-28 16:28 UTC (History)
2 users (show)

See Also:
Latest Commit:
Version Fixed/Implemented In:
Sentry Crash Report:


Attachments
Full output of valgrind crashing (6.29 KB, text/plain)
2019-07-04 19:08 UTC, 4ctrl.alt.del
Details

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Description 4ctrl.alt.del 2019-07-04 19:08:06 UTC
Created attachment 121325 [details]
Full output of valgrind crashing

When I call valgrind to profile my Qt program it fails with the following vex message:

vex amd64->IR: unhandled instruction bytes: 0x8F 0xE8 0x78 0xCD 0xC9 0x4 0xC5 0xF9 0xD7 0xC9
vex amd64->IR:   REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
vex amd64->IR:   VEX=0 VEX.L=0 VEX.nVVVV=0x0 ESC=NONE
vex amd64->IR:   PFX.66=0 PFX.F2=0 PFX.F3=0

uname -a:
Linux chimera 4.19.27-gentoo-r1 #1 SMP Tue Apr 16 08:41:25 PDT 2019 x86_64 AMD FX(tm)-9370 Eight-Core Processor AuthenticAMD GNU/Linux

GCC:
gcc (Gentoo 8.3.0-r1 p1.1) 8.3.0

KDE Plasma version: 5.15.5
Qt Version: 5.12.3
Comment 1 4ctrl.alt.del 2019-07-04 19:11:22 UTC
It seems to be executing code in the qtcore library. This library was compiled with the following relevant flags from my systems configuration:

"-O2 -march=bdver1 -pipe"

I'm guessing the -march flag is relevant to this.
Comment 2 Mark Wielaard 2019-07-04 20:53:57 UTC
This is vpcomw xmm1,xmm0,xmm1,0x4 disassembled.
Comment 3 Mark Wielaard 2019-07-04 20:58:48 UTC
vpcomw is part of the AMD XOP instruction set:
https://en.wikipedia.org/wiki/XOP_instruction_set

gcc -march=bdver1 enables this instruction set (among others):

           bdver1
               CPUs based on AMD Family 15h cores with x86-64 instruction set
               support.  (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL,
               CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM
               and 64-bit instruction set extensions.)
Comment 4 4ctrl.alt.del 2019-07-08 19:32:53 UTC
I'm confused why valgrind version 3.14 released in October of 2018 does not recognize an XOP instruction that AMD announced in May of 2008.
Comment 5 Tom Hughes 2019-07-08 19:59:37 UTC
Because nobody has provided a patch to implement it?

Perhaps you are under the belief that we have a full time team of programmers paid to read each new architecture and immediately implement all the new instructions? I'm afraid that is not how it works.

The simple answer is that commonly used instructions are always going to be the first to get implemented when only limited resources are available, and instructions specific to a minority processor brand are less likely to get done because most people build code to target a broad range of processors so will never encounter such instructions.

Of course if somebody offers a high quality patch to implement them then I'm sure it would be gratefully accepted.
Comment 6 4ctrl.alt.del 2019-07-08 20:21:57 UTC
That makes sense thanks. It looks like XOP was abandoned by AMD with Zen which probably makes it even less of a priority.
Comment 7 Julian Seward 2019-12-28 16:28:46 UTC
I'm going to close this, since supporting this insn set extension is
not on our radar.  Plus, it seems easy to work around.