Bug 396839 - s390x: Trap instructions not implemented
Summary: s390x: Trap instructions not implemented
Status: RESOLVED FIXED
Alias: None
Product: valgrind
Classification: Developer tools
Component: vex (show other bugs)
Version: 3.14 SVN
Platform: unspecified Linux
: NOR crash
Target Milestone: ---
Assignee: Julian Seward
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2018-07-25 10:59 UTC by Andreas Arnez
Modified: 2018-09-24 16:37 UTC (History)
3 users (show)

See Also:
Latest Commit:
Version Fixed In:


Attachments
Implement conditional trap instructions (32.53 KB, patch)
2018-09-21 15:15 UTC, Andreas Arnez
Details
Implement conditional trap instructions, v2 (32.53 KB, patch)
2018-09-21 17:24 UTC, Andreas Arnez
Details

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Description Andreas Arnez 2018-07-25 10:59:55 UTC
Some compilers now generate compare and trap instructions.  But none of the "... and trap" instructions are implemented in Valgrind so far.  Currently these are CRT, CGRT, CIT, CGIT, CLRT,CLGRT, CLGIT, CLFIT, LAT, LGAT, LFHAT, LLGFAT, and LLGTAT.
Comment 1 Vadim Barkov 2018-07-25 19:04:56 UTC
Since valgrind doesn't model exceptions for s390x there is not clear how to implement this intstructions.

So,

LAT - load and trap = simple load
CRT - compare and trap = just NOP (do nothing)

etc.

Andreas, am I correct?
Comment 2 Julian Seward 2018-07-26 08:52:26 UTC
(In reply to Vadim Barkov from comment #1)
> Since valgrind doesn't model exceptions for s390x there is not clear how to
> implement this intstructions.

To see how to implement exceptions, look at the PPC front end, which implements
a whole bunch of traps.  I'm pretty sure other targets do too.  In particular
look for the text "Ijk_SigTRAP" in guest_ppc_toIR.c.
Comment 3 Mark Wielaard 2018-08-30 14:17:43 UTC
On Fedora 28 the testsuite now hits this in the none/tests/s390x/fpconv testcase when it tries to printf:

vex s390->IR: unimplemented insn: EC80 0000 8070
==27028== valgrind: Unrecognised instruction at address 0x48a4372.
==27028==    at 0x48A4372: __mpn_divrem (divrem.c:162)
==27028==    by 0x1FFEFFE16F: ???

(gdb) bt
#0  __mpn_divrem (qp=0x1ffeffe870, qextra_limbs=qextra_limbs@entry=0, 
    np=0x1ffeffe910, nsize=12, dp=dp@entry=0x1ffeffe7d0, dsize=12)
    at divrem.c:161
#1  0x00000000048ac85a in hack_digit (p=p@entry=0x1ffeffea50)
    at printf_fp.c:184
#2  0x00000000048ad620 in __GI___printf_fp_l (
    fp=fp@entry=0x49efcb0 <_IO_2_1_stdout_>, loc=<optimized out>, 
    info=info@entry=0x1ffeffec80, args=args@entry=0x1ffeffed38)
    at printf_fp.c:938
#3  0x00000000048af6ae in ___printf_fp (
    fp=fp@entry=0x49efcb0 <_IO_2_1_stdout_>, info=info@entry=0x1ffeffec80, 
    args=args@entry=0x1ffeffed38) at printf_fp.c:1272
#4  0x00000000048aae24 in _IO_vfprintf_internal (
    s=0x49efcb0 <_IO_2_1_stdout_>, 
    format=0x1001aa6 "cfdbr %f -> %ld   cc = %d\n", ap=ap@entry=0x1ffefff1c0)
    at vfprintf.c:1642
#5  0x00000000048b2132 in __printf (format=<optimized out>) at printf.c:33
#6  0x000000000100158c in main () at fpconv.c:116

(gdb) disassemble /r
Dump of assembler code for function __mpn_divrem:
   0x00000000048a42f0 <+0>:	eb 6f f0 30 00 24	stmg	%r6,%r15,48(%r15)
   0x00000000048a42f6 <+6>:	b9 04 00 ef	lgr	%r14,%r15
   0x00000000048a42fa <+10>:	e3 f0 fe f8 ff 71	lay	%r15,-264(%r15)
   0x00000000048a4300 <+16>:	a7 eb ff e0	aghi	%r14,-32
   0x00000000048a4304 <+20>:	60 80 e0 00	std	%f8,0(%r14)
   0x00000000048a4308 <+24>:	60 a0 e0 08	std	%f10,8(%r14)
   0x00000000048a430c <+28>:	60 c0 e0 10	std	%f12,16(%r14)
   0x00000000048a4310 <+32>:	60 e0 e0 18	std	%f14,24(%r14)
   0x00000000048a4314 <+36>:	e3 20 f0 a0 00 24	stg	%r2,160(%r15)
   0x00000000048a431a <+42>:	b9 04 00 d3	lgr	%r13,%r3
   0x00000000048a431e <+46>:	e3 80 f1 a8 00 04	lg	%r8,424(%r15)
   0x00000000048a4324 <+52>:	ec 88 01 fc 01 7c	cgije	%r8,1,0x48a471c <__mpn_divrem+1068>
   0x00000000048a432a <+58>:	ec 88 01 72 02 7c	cgije	%r8,2,0x48a460e <__mpn_divrem+798>
   0x00000000048a4330 <+64>:	e3 30 f0 a8 00 24	stg	%r3,168(%r15)
   0x00000000048a4336 <+70>:	e3 20 f0 b0 00 24	stg	%r2,176(%r15)
   0x00000000048a433c <+76>:	b9 e9 80 15	sgrk	%r1,%r5,%r8
   0x00000000048a4340 <+80>:	eb 11 00 03 00 0d	sllg	%r1,%r1,3
   0x00000000048a4346 <+86>:	eb 28 00 03 00 0d	sllg	%r2,%r8,3
   0x00000000048a434c <+92>:	e3 20 f0 b8 00 24	stg	%r2,184(%r15)
   0x00000000048a4352 <+98>:	ec 32 ff f8 00 d9	aghik	%r3,%r2,-8
   0x00000000048a4358 <+104>:	41 b1 40 00	la	%r11,0(%r1,%r4)
   0x00000000048a435c <+108>:	b9 04 00 12	lgr	%r1,%r2
   0x00000000048a4360 <+112>:	a7 2b ff f0	aghi	%r2,-16
   0x00000000048a4364 <+116>:	b3 c1 00 86	ldgr	%f8,%r6
   0x00000000048a4368 <+120>:	e3 30 f0 c0 00 24	stg	%r3,192(%r15)
   0x00000000048a436e <+126>:	b9 04 00 62	lgr	%r6,%r2
   0x00000000048a4372 <+130>:	ec 80 00 00 80 70	cgite	%r8,0
=> 0x00000000048a4378 <+136>:	b3 cd 00 28	lgdr	%r2,%f8
   0x00000000048a437c <+140>:	e3 a1 2f f8 ff 04	lg	%r10,-8(%r1,%r2)
   0x00000000048a4382 <+146>:	41 d3 b0 00	la	%r13,0(%r3,%r11)
   0x00000000048a4386 <+150>:	e3 91 2f f0 ff 04	lg	%r9,-16(%r1,%r2)

So that is the cgite instruction.
Comment 4 Andreas Arnez 2018-09-21 15:15:40 UTC
Created attachment 115146 [details]
Implement conditional trap instructions

This implements all conditional trap instructions, including the variants of "load and trap" and "compare and trap".  An appropriate test case is added.  In order to emit the correct signal, the new jump kind Ijk_SigFPE is introduced.
Comment 5 Mark Wielaard 2018-09-21 15:44:31 UTC
(In reply to Andreas Arnez from comment #4)
> Created attachment 115146 [details]
> Implement conditional trap instructions

Nice. With this patch the testcase mentioned in comment #3 none/tests/s390x/fpconv succeeds again.
Comment 6 Julian Seward 2018-09-21 16:59:45 UTC
(In reply to Andreas Arnez from comment #4)
> Created attachment 115146 [details]
> Implement conditional trap instructions

This looks good to me.  I would request only that for this ..

+#define VEX_TRC_JMP_SIGFPE     96  /* deliver SIGFPE before continuing */

you continue with the convention of using odd numbers.  I think that
the lowest available odd number in that group is 105, but please check.
If that doesn't work then it looks like 115 is available.
Comment 7 Andreas Arnez 2018-09-21 17:24:58 UTC
Created attachment 115151 [details]
Implement conditional trap instructions, v2

This version has
  #define VEX_TRC_JMP_SIGFPE    105
and is otherwise the same as the previous one.  AFAICT, 105 is indeed the next available odd number.  Is there anywhere else to check except in libvex_trc_values.h?
Comment 8 Mark Wielaard 2018-09-21 17:25:35 UTC
(In reply to Mark Wielaard from comment #5)
> (In reply to Andreas Arnez from comment #4)
> > Created attachment 115146 [details]
> > Implement conditional trap instructions
> 
> Nice. With this patch the testcase mentioned in comment #3
> none/tests/s390x/fpconv succeeds again.

A full regtest on fedora 28 without and with the patch shows the following tests now passing:

none/tests/s390x/fpconv
none/tests/s390x/pfpo

No regressions.
Comment 9 Andreas Arnez 2018-09-24 15:22:46 UTC
I've pushed this now as git commit 20976f432.