vex amd64->IR: unhandled instruction bytes: 0xF3 0xF 0x1E 0xFA 0x48 0x8B 0x5 0xBD 0xAF 0x51 vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0 vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x0 ESC=0F vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=1 ==67041== valgrind: Unrecognised instruction at address 0x4e53f10. ==67041== at 0x4E53F10: floor (in /usr/local/intel/compilers_and_libraries_2018.1.163/linux/compiler/lib/intel64_lin/libimf.so)
So a colleague was bitten by the same instructions on Arch with ld: https://lists.freedesktop.org/archives/libreoffice-qa/2018-August/010517.html Some research found: https://github.com/aquynh/capstone/issues/1129 I'm just quoting the information: Intel introduced new instructions for the protection of indirect branches, which make the processor fault if the target of an indirect jump is not an endbr{32,64} instruction. If the processor does not support Indirect Branch Tracking (IBT), the instruction is a nop (see [0], pages 15ff. and 130f.) The instruction bytes for endbr64 are f3 0f 1e fa, for endbr32 they are f3 0f 1e fb. So I guess there will be more of these in the future. [0] https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
I have upgraded to version 3.13.0+290+2b0aa0a5-1 from the Arch Linux repos and my problem is gone! David: can you test with the latest version?
Sorry, I can't test, I did not keep the failure case, just reported the error as the message said to.