This patch fixed the problem:

diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c
index d2bcf16..54ccd07 100644
--- a/VEX/priv/guest_arm_toIR.c
+++ b/VEX/priv/guest_arm_toIR.c
@@ -19671,10 +19671,10 @@ DisResult disInstr_THUMB_WRK (
           && rD != 15 && rN == 13 && imm5 <= 3 && how == 0) {
          valid = True;
       }
-      /* also allow "sub.w reg, sp, reg   w/ no shift
+      /* also allow "sub.w reg, sp, reg   lsl #N for N=0,1,2 or 3
          (T1) "SUB (SP minus register) */
       if (!valid && INSN0(8,5) == BITS4(1,1,0,1) // sub
-          && rD != 15 && rN == 13 && imm5 == 0 && how == 0) {
+          && rD != 15 && rN == 13 && imm5 <= 3 && how == 0) {
          valid = True;
       }
       if (valid) {