Bug 316382 - Support for AMDs FMA4 instructions seem to be missing
Summary: Support for AMDs FMA4 instructions seem to be missing
Status: RESOLVED DUPLICATE of bug 369000
Alias: None
Product: valgrind
Classification: Developer tools
Component: vex (show other bugs)
Version: 3.8.0
Platform: Other Linux
: NOR wishlist
Target Milestone: ---
Assignee: Julian Seward
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2013-03-08 19:14 UTC by ake.sandgren
Modified: 2021-02-28 18:34 UTC (History)
2 users (show)

See Also:
Latest Commit:
Version Fixed In:

Attachments
Test case which reproduces illegal instruction (does not work with current trunk as well) (217 bytes, text/x-c)
2013-07-15 17:49 UTC, Konstantin Tokarev 		Details
Result of compilation (2.63 KB, text/x-asm)
2013-07-15 17:55 UTC, Konstantin Tokarev 		Details
View All Add an attachment

Note You need to log in before you can comment on or make changes to this bug.
Description ake.sandgren 2013-03-08 19:14:46 UTC 
I'm getting the following using valgrind 3.8.1
vex amd64->IR: unhandled instruction bytes: 0xC4 0x43 0x19 0x6B 0xE5 0xE0 0xF2 0
x44
vex amd64->IR:   REX=0 REX.W=0 REX.R=1 REX.X=0 REX.B=1
vex amd64->IR:   VEX=1 VEX.L=0 VEX.nVVVV=0xC ESC=0F3A
vex amd64->IR:   PFX.66=1 PFX.F2=0 PFX.F3=0

That comes from a vfmaddsd %xmm12,%xmm13,%xmm14,%xmm12

Reproducible: Always
Comment 1 Konstantin Tokarev 2013-07-15 17:49:18 UTC 
Created attachment 81131 [details]
Test case which reproduces illegal instruction (does not work with current trunk as well)
Comment 2 Konstantin Tokarev 2013-07-15 17:55:10 UTC 
Created attachment 81132 [details]
Result of compilation
Comment 3 ake.sandgren 2014-01-22 07:17:59 UTC 
Looks like it is fixed in 3.9.0, at least my test cases no longer trip
Comment 4 Tom Hughes 2014-01-23 12:26:11 UTC 
I think your compiler has just changed what code it is generating - the instruction here is a VEX prefixed version of "0F 3A 6B" and that does not appear to be implemented in the current code, which would be consistent with it being an AMD extension. Certainly that instruction is not documented in the Intel manual.
Comment 5 ake.sandgren 2014-01-23 12:55:33 UTC 
It's even more likely that i messed up which test case belonged to which problem :-(

Yeah, the problem is still there in 3.9.0, and yes, that's from AMD's FMA4 instruction set.

I would really like it if it could get implemented.
Comment 6 Tom Hughes 2014-01-23 13:24:57 UTC 
I suspect it's unlikely unless somebody who wants it steps up to do it, or unless those extensions gain a lot more traction.
Comment 7 Mark Wielaard 2021-02-28 18:34:00 UTC 
This was added as part of bug #369000 for 128bit FMA4 instructions, 256bit FMA4 instructions aren't supported yet and are tracked as bug #369053

*** This bug has been marked as a duplicate of bug 369000 ***