Bug 445415

Summary: arm64 front end: alignment checks missing for atomic instructions
Product: [Developer tools] valgrind Reporter: Julian Seward <jseward>
Component: vexAssignee: Julian Seward <jseward>
Status: REPORTED ---    
Severity: normal    
Priority: NOR    
Version First Reported In: unspecified   
Target Milestone: ---   
Platform: Other   
OS: Linux   
Latest Commit: Version Fixed/Implemented In:
Sentry Crash Report:

Description Julian Seward 2021-11-13 08:22:30 UTC 
For the arm64 front end, none of the atomic instructions have address
alignment checks included in their IR.  They all should.  The effect of 
missing alignment checks in the IR is that, since this IR will in most cases
translated back to atomic instructions in the back end, we will get 
alignment traps (SIGBUS) on the host side and not on the guest side,
which is (very) incorrect behaviour of the simulation.