Summary: | amd64->IR: unhandled instruction bytes: 0x8F 0xE9 0xF8 0x9B 0x5 0x5B 0x61 0xC 0x0 0xB8 | ||
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Product: | [Developer tools] valgrind | Reporter: | Joseph <joseph.jenne15> |
Component: | memcheck | Assignee: | Julian Seward <jseward> |
Status: | RESOLVED DUPLICATE | ||
Severity: | normal | CC: | mark, pjfloyd, tom |
Priority: | NOR | ||
Version: | unspecified | ||
Target Milestone: | --- | ||
Platform: | Other | ||
OS: | Linux | ||
Latest Commit: | Version Fixed In: |
Description
Joseph
2020-07-09 19:17:14 UTC
Can you say what model of CPU this is with? (model name and flags from /proc/cpuinfo) (In reply to Paul Floyd from comment #1) > Can you say what model of CPU this is with? (model name and flags from > /proc/cpuinfo) model name : AMD A9-9425 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good acc_power nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm perfctr_core perfctr_nb bpext ptsc mwaitx cpb hw_pstate ssbd ibpb vmmcall fsgsbase bmi1 avx2 smep bmi2 xsaveopt arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif overflow_recov I'm pretty sure that's one of the AMD specific instructions that we don't support. As a rule don't use -march=native on code you want to valgrind, especially if you're on a very recent CPU or an AMD CPU. (In reply to Tom Hughes from comment #3) > I'm pretty sure that's one of the AMD specific instructions that we don't > support. Is there a list of those instructions in the docs somewhere? As list of instructions we don't support? No, because it's not some intentional decision, it's just things nobody has done yet. In this case it's an AMD XOP instruction (https://en.wikipedia.org/wiki/XOP_instruction_set) given the 8F prefix and I don't believe any of those have been implemented. Indeed, this is the XOP VPSHAQ Packed Shift Arithmetic Quadwords instruction. *** This bug has been marked as a duplicate of bug 339596 *** |