Bug 422677

Summary:	PPC sync instruction L field should only be 2 bits in ISA 3.0
Product:	[Developer tools] valgrind	Reporter:	Carl Love <cel>
Component:	vex	Assignee:	Carl Love <cel>
Status:	CLOSED FIXED
Severity:	normal	CC:	tuliom, will_schmidt
Priority:	NOR
Version First Reported In:	3.15 SVN
Target Milestone:	---
Platform:	Other
OS:	Linux
Latest Commit:		Version Fixed/Implemented In:
Sentry Crash Report:

Description Carl Love 2020-06-09 15:28:44 UTC

The L field for the sync instruction is being set to a 5 bit value.  This allows the user to set values greater then 3.  The value is then flagged as being out of bounds.  The ISA 3.0 specifies the field is two bits wide.  If a user specifies a value greater then three only the lower two bits should be used.

In ISA 3.1 the field is expanded to three bits wide.  Support for this will need to be added when the ISA 3.1 support is added for Power.

This bug exists in Valgrind 3.16 and earlier.

Comment 1 Carl Love 2020-06-15 20:51:23 UTC

Fixed, tested by user, closing.

commit fb6f7abcbc92506d302fb18a2c5fc853d2929248
Author: Carl Love <cel@us.ibm.com>
Date:   Tue Jun 9 10:42:03 2020 -0500

    Power PC Fix extraction of the L field for sync instruction
    
    The L field is currently a two bit[22:21] field in ISA 3.0. The size of the
    L field has changed over time.
    
    Currently the ISA 3.0 Valgrind sync instruction support code sets the
    flag_L for the instruction L field to a five bit value that includes bits
    that are marked reserved the sync instruction.  This patch fixes the issue for ISA 3.0
    to only setting flag_L the specified two bits.
    
    Valgrind bugzilla:   https://bugs.kde.org/show_bug.cgi?id=422677