Bug 362934

I integrated valgrind 3.11.0 into AsusWRT-Merlin 380.58. I tried to use it on RT-AC87U and RT-AC5300 routers (they are using different toolchains).

When I try to check arbitrary program with Valgrind, it prints:

admin@RT-AC5300-0810:/tmp/home/root# valgrind qharvestd -F -c/tmp/qharvestd.conf
==1063== Memcheck, a memory error detector
==1063== Copyright (C) 2002-2015, and GNU GPL'd, by Julian Seward et al.
==1063== Using Valgrind-3.11.0 and LibVEX; rerun with -h for copyright info
==1063== Command: qharvestd -F -c/tmp/qharvestd.conf
==1063== 
==1063== 
==1063== Process terminating with default action of signal 4 (SIGILL)
==1063==  Illegal opcode at address 0x3807472C
==1063==    at 0x4000930: _start (in /lib/ld-uClibc.so.0)
==1063== 
==1063== HEAP SUMMARY:
==1063==     in use at exit: 0 bytes in 0 blocks
==1063==   total heap usage: 0 allocs, 0 frees, 0 bytes allocated
==1063== 
==1063== All heap blocks were freed -- no leaks are possible
==1063== 
==1063== For counts of detected and suppressed errors, rerun with: -v
==1063== ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
Illegal instruction

Almost the same with cachegrind:
admin@RT-AC5300-0810:/tmp/home/root# valgrind  --tool=cachegrind qharvestd -F -c/tmp/qharvestd.conf
==1061== Cachegrind, a cache and branch-prediction profiler
==1061== Copyright (C) 2002-2015, and GNU GPL'd, by Nicholas Nethercote et al.
==1061== Using Valgrind-3.11.0 and LibVEX; rerun with -h for copyright info
==1061== Command: qharvestd -F -c/tmp/qharvestd.conf
==1061== 
--1061-- Warning: Cannot auto-detect cache config, using defaults.
--1061--          Run with -v to see.
==1061== 
==1061== Process terminating with default action of signal 4 (SIGILL)
==1061==  Illegal opcode at address 0x38047DF8
==1061==    at 0x4000930: _start (in /lib/ld-uClibc.so.0)
==1061== 
==1061== I   refs:      0
==1061== I1  misses:    0
==1061== LLi misses:    0
==1061== I1  miss rate: 0.00%
==1061== LLi miss rate: 0.00%
==1061== 
==1061== D   refs:      0  (0 rd   + 0 wr)
==1061== D1  misses:    0  (0 rd   + 0 wr)
==1061== LLd misses:    0  (0 rd   + 0 wr)
==1061== D1  miss rate: 0.0% (0.0%     + 0.0%  )
==1061== LLd miss rate: 0.0% (0.0%     + 0.0%  )
==1061== 
==1061== LL refs:       0  (0 rd   + 0 wr)
==1061== LL misses:     0  (0 rd   + 0 wr)
==1061== LL miss rate:  0.0% (0.0%     + 0.0%  )
Illegal instruction

admin@RT-AC5300-0810:/tmp/home/root# cat /proc/cpuinfo
Processor       : ARMv7 Processor rev 0 (v7l)
processor       : 0
BogoMIPS        : 2798.38

processor       : 1
BogoMIPS        : 2798.38

Features        : swp half thumb fastmult edsp 
CPU implementer : 0x41
CPU architecture: 7
CPU variant     : 0x3
CPU part        : 0xc09
CPU revision    : 0

Hardware        : Northstar Prototype
Revision        : 0000
Serial          : 0000000000000000


The only change I introduced in the source code is in configure script: armv7*) -> arm*). Without this change configure fails.