| Summary: | ppc Power-QUICC-III (8555, e500 core) not supported: isel instruction | ||
|---|---|---|---|
| Product: | [Developer tools] valgrind | Reporter: | Ron Vleugel <vleugel> |
| Component: | vex | Assignee: | Julian Seward <jseward> |
| Status: | RESOLVED DUPLICATE | ||
| Severity: | major | ||
| Priority: | NOR | ||
| Version: | 3.3.0 | ||
| Target Milestone: | --- | ||
| Platform: | RedHat Enterprise Linux | ||
| OS: | Linux | ||
| Latest Commit: | Version Fixed In: | ||
| Sentry Crash Report: | |||
It's isel: 0: 7d 29 5f 1e isel r9,r9,r11,28 *** This bug has been marked as a duplicate of 160956 *** Mistake: this is not a duplicate of #160956, it's a duplicate of #160954. Reopening. |
When using valgrind with a simple program on a Power-QUICC-III, the program is direct stopped due to disInstr(ppc): unhandled instruction: 0x7D295F1E primary 31(0x1F), secondary 1822(0x71E) ==00:00:00:00.362 31610== valgrind: Unrecognised instruction at address 0x4004E10. ... ==00:00:00:00.362 31610== Process terminating with default action of signal 4 (SIGILL): dumping core ==00:00:00:00.363 31610== Illegal opcode at address 0x4004E10 ==00:00:00:00.363 31610== at 0x4004E10: _dl_start (do-rel.h:79) ==00:00:00:00.363 31610== by 0x4010D08: _start (dl-start.S:39) ==00:00:00:00.365 31610== It appears to be the new "isel" instruction, which is newly introduced for the e500 core of this PowerQuick. The ppc objdump of the _dl_start at ld-2.3.3.so also seems to be having some trouble with this instruction: 4dfc: 80 0a 00 04 lwz r0,4(r10) 4e00: 54 09 08 3c rlwinm r9,r0,1,0,30 4e04: 7d 29 02 14 add r9,r9,r0 4e08: 55 29 10 3a rlwinm r9,r9,2,0,29 4e0c: 7f 89 58 40 cmplw cr7,r9,r11 4e10: 7d 29 5f 1e .long 0x7d295f1e 4e14: 7d 0b 43 78 mr r11,r8 4e18: 7f e8 4a 14 add r31,r8,r9 4e1c: 7f 88 f8 40 cmplw cr7,r8,r31 4e20: 40 9c 00 20 bge- cr7,4e40 <_dl_start+0x338> 4e24: 80 0b 00 08 lwz r0,8(r11) 4e28: 81 2b 00 00 lwz r9,0(r11) cat /proc/cpuinfo processor : 0 cpu : e500 revision : 2.0 (pvr 8020 0020) bogomips : 524.28 chipset : 8555E Vendor : Motorola SPS Machine : CPLAB PQ3MC1 bus freq : 528.000000 MHz PVR : 0x80200020 SVR : 0x80790011 PLL setting : 0x4 Memory : 2040 MB To support the "isel" instruction, I expect changes to be made at VEX/priv/guest-ppc/toIR.c: line 9263: /* Integer Load Instructions */ case 0x057: case 0x077: case 0x157: // lbzx, lbzux, lhax case 0x177: case 0x117: case 0x137: // lhaux, lhzx, lhzux case 0x017: case 0x037: // lwzx, lwzux case 0x00F: case 0x02F: case 0x04F: // <<< isel: isellt, iselgt, iseleq if (dis_int_load( theInstr )) goto decode_success; goto decode_failure; and function dis_int_load. However how the changes look there, I do not know. I cannot say if other changes are necessary to support this version of the PowerQuick. The "isel" is at least a start.