Summary: | vex amd64->IR: unhandled instruction bytes: 0xC2 0x8 0x0 | ||
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Product: | [Developer tools] valgrind | Reporter: | Sebastian Biallas <sb> |
Component: | vex | Assignee: | Julian Seward <jseward> |
Status: | RESOLVED FIXED | ||
Severity: | crash | CC: | njn, tom |
Priority: | NOR | ||
Version: | 3.2.1 | ||
Target Milestone: | --- | ||
Platform: | Compiled Sources | ||
OS: | Linux | ||
Latest Commit: | Version Fixed In: | ||
Sentry Crash Report: | |||
Bug Depends on: | |||
Bug Blocks: | 253451 | ||
Attachments: | Patch against 3.2.1 |
Description
Sebastian Biallas
2006-11-01 16:30:01 UTC
Created attachment 18353 [details]
Patch against 3.2.1
Enables support for "ret imm16" on amd64.
Sebastian, does the following work for you? case 0xC2: /* RET imm16 */ if (have66orF2orF3(pfx)) goto decode_failure; d64 = getUDisp16(delta); delta += 2; dis_ret(vmi, d64); whatNext = Dis_StopHere; DIP("ret %lld\n", d64); break; My patch attached patch works. Your code lacks the definition of "getUDisp16" and I don't know what "vmi" is (I use version 3.2.1) This was fixed by VEX r1676. |